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06 Static Scheduling,Scoreboard

06 Static Scheduling,Scoreboard

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2039
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• Hazards limit performance – Structural: need more HW resources – Data: need forwarding, compiler scheduling – Control: early evaluation & PC, delayed branch, prediction • Increasing length of pipe increases impact of hazards – pipelining helps instruction bandwidth, not latency! • Instruction Level Parallelism (ILP) found either by compiler or hardware. • DataFlow view: – Data triggers execution rather than instructions triggering data
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