短沟道MOSFET I-V小信号模型

短沟道MOSFET I-V小信号模型中同时考虑了速度饱和效应、迁移率下降效应和沟道长度调制效应等。
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1. Lecture #26 ANNOUNCEMENT • The lowest HW grade will be dropped for each student OUTLINE • Small-signal MOSFET model • MOSFET scaling • Velocity saturation • Short-channel MOSFETs Spring 2003 EE130 Lecture 26, Slide 1 Small Signal Model • Conductance parameters: ∂I D gd = = λI Dsat 0 ∂VD V G = const ∂I D Wµeff Coxe gm = = (VGS − VT ) ∂VG V mL D = const Spring 2003 EE130 Lecture 26, Slide 2 1

2. Inclusion of Additional Parasitics Spring 2003 EE130 Lecture 26, Slide 3 Cutoff Frequency • fmax is the frequency where the MOSFET is no longer amplifying the input signal – Obtained by considering the small-signal model with the output terminals short-circuited, and finding the frequency where |iout / iin| = 1 gm Wµeff 1 f max = = (VGS − VT ) ∝ 2πCoxe 2πmL L → Increased MOSFET operating frequencies are achieved by decreasing the channel length Spring 2003 EE130 Lecture 26, Slide 4 2

3. MOSFET Scaling • MOSFETs have scaled in size over time – 1970’s: ~ 10 µm – Today: ~50 nm • Reasons: – Speed – Density Spring 2003 EE130 Lecture 26, Slide 5 Benefit of Transistor Scaling – IDS ↑ as L ↓ (decreased effective “R”) – Gate area ↓ as L ↓ (decreased load “C”) – Therefore, RC ↓ (implies faster switch) Spring 2003 EE130 Lecture 26, Slide 6 3

4. Circuit Example – CMOS Inverter Vd d ........... V1 V2 V3 ............ C C V2 Vd d 2 τd V3 τ d : propagation delay V1 0 t Spring 2003 EE130 Lecture 26, Slide 7 1 τ d ≡ ( pull − down delay + pull − up delay ) 2 CVdd pull − up delay ≈ 2 I dsatP CVdd pull − down delay ≈ 2 I dsatN CVdd 1 1 τd = ( + ) τd is reduced by increasing IDsat 4 I dsatN I dsatP Vdd Vdd RN and RP = = 2 I on 2 I dsat (| Vg |= Vdd ) Spring 2003 EE130 Lecture 26, Slide 8 4

5. Velocity Saturation • velocity saturation has µ v = large and deleterious 1+ effect on the IDsat of sat MOSFETS << sat :v=µ >> sat : v = µ sat Spring 2003 EE130 Lecture 26, Slide 9 MOSFET I-V with Velocity Saturation W m Coxe µ eff (VGS − VT − VDS)VDS 2 I DS = L V 1 + DS sat L long - channel I DS I DS = 1 + VDS / sat L Spring 2003 EE130 Lecture 26, Slide 10 5

6. dI DS Solving for = 0, dVDS 2(VGS − VT) VDsat = 1 + 1 + 2(VGS − VT) / sat L A simpler and more accurate VDsat is: 1 m 1 = + VDsat VGS − VT sat L m = 1 + 3Toxe/Wdm 2vsat ≡ sat µ Spring 2003 EE130 Lecture 26, Slide 11 Drain Saturation Voltage VDsat 1 m 1 = + VDsat VGS − VTn Esat L • If EsatL >> VGS-VTn then the MOSFET is considered “long-channel”. This condition can be satisfied when – L is large, or – VGS is close to VT Spring 2003 EE130 Lecture 26, Slide 12 6

7. EXAMPLE: Drain Saturation Voltage Question: At Vgs = 1.8 V, what is the VDsat of an NFET with Toxe = 3 nm, VT = 0.25 V, and Wdm = 45 nm for (a) L =10 µm, (b) L = 1 um, (c) L = 0.1 µm, and (d) L = 0.05 µm Solution: From VGS , VT, and Toxe , µn is 200 cm2V-1s-1. sat=2vsat/µ = 8 ×104 V/cm m = 1 + 3Toxe/Wdm = 1.2 −1  m 1  VDsat =  +   VGS − VT sat L  Spring 2003 EE130 Lecture 26, Slide 13 −1  m 1  VDsat =  +   V GS − VT sat L  (a) L = 10 µm, VDsat= (1/1.3V + 1/80V)-1 = 1.3 V (b) L = 1 µm, VDsat= (1/1.3V + 1/8V)-1 = 1.1 V (c) L = 0.1 µm, VDsat= (1/1.3V + 1/.8V)-1 = 0.5 V (d) L = 0.05 µm, VDsat= (1/1.3V + 1/.4V)-1 = 0.3 V Spring 2003 EE130 Lecture 26, Slide 14 7

8. IDsat with Velocity Saturation Substituting VDsat for VDS in IDS equation gives: W (VGS − VT) 2 long - channel I Dsat I Dsat = Coxe µeff = 2mL VGS − VT VGS − VT 1+ 1+ sat L sat L Very short channel case: sat L << VGS − VT W I Dsat = C oxe µ n sat (V GS − VT) 2m = Wv sat C oxe (V GS − VT ) / m • IDsat is proportional to VGS–VT rather than (VGS – VT)2 Spring 2003 EE130 Lecture 26, Slide 15 Summary: NMOSFET I-V • Linear region: W m Coxe µeff (VGS − VTn − VDS )VDS I DS = L 2 V 1 + DS Esat L Esat = 2vsat / µeff 8 × 106 cm/s for electrons • Saturation region: vsat =   6 × 10 cm/s for holes 6 W Coxe µeff (VGS − VTn ) 2 I DS = I Dsat = 2mL (V − VTn ) 1 + GS Esat L Spring 2003 EE130 Lecture 26, Slide 16 8

9. Very-Short-Channel MOSFETs • If EsatL << VGS-VTn : (VGS − VTn ) VDsat ≅ Esat L < m W I Dsat = Coxe µ eff Esat (VGS − VTn ) 2m W = Coxe vsat (VGS − VTn ) m ⇒ IDsat is not sensitive to L • To increase IDsat (for faster circuit operation), we must increase Coxe(VGS-VTn), i.e. reduce Toxe and VTn Spring 2003 EE130 Lecture 26, Slide 17 Short- vs. Long-Channel MOSFET 0.4 0.03 L = 0.15 µm L = 2.0 µm Vgs = 2.5V V gs = 2.5V Vt = 0.4 V Vt = 0.7 V 0.3 I ds (mA/µm) 0.02 V gs = 2.0V Ids (µA/µm) Vgs = 2.0V 0.2 V gs = 1.5V 0.01 Vgs = 1.5V 0.1 V gs = 1.0V Vgs = 1.0 V 0.0 0.0 0 1 2 2.5 V ds (V) Vds (V) Short-channel MOSFET: • IDsat is proportional to VGS-VTn rather than (VGS-VTn)2 • VDsat is lower than for long-channel MOSFET • Channel-length modulation is apparent Spring 2003 EE130 Lecture 26, Slide 18 9

10. Velocity Overshoot • When L is comparable to or less than the mean free path, some of the electrons travel through the channel without experiencing a single scattering event → projectile-like motion (“ballistic transport”) ⇒ The average velocity of carriers exceeds vsat e.g. 35% for L = 0.12 µm NMOSFET ⇒ Effectively, vsat and Esat increase when L is very small Spring 2003 EE130 Lecture 26, Slide 19 PMOSFET I-V with Velocity Saturation • Linear region: W m − Coxe µeff (VGS + VTp − VDS )VDS I DS = L 2 V 1 + DS Esat L • Saturation region: W − Coxe µeff (VGS − VTp )2 I DS = I Dsat = 2mL VGS − VTp 1+ Esat L Spring 2003 EE130 Lecture 26, Slide 20 10