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操作系统和系统编程简介
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1 . CS162 Operating Systems and Systems Programming Lecture 1 What is an Operating System? August 23rd , 2017 Prof. Ion Stoica http://cs162.eecs.Berkeley.edu
2 . Who am I? • Ion Stoica – 465 Soda Hall (RISE Lab) – Web: http://www.cs.berkeley.edu/~istoica/ – Office hours: Mondays 11-12pm, and Wednesdays 12-1pm in 465F Soda • Research areas: – ML systems (Clipper, Ray, Pywren, …) – Big Data systems (Apache Spark, Succinct, …) – Previous: Cloud computing (Apache Mesos, Alluxio), Peer-to-Peer networking (Chord), Networking QoS 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.2
3 . “The Magnificent Seven” - CS162 TAs Michael Do Anurag Khandelwal Qifan Pu Stephanie Wang Neeraja Yadwadkar Patrick Yang Justin Yum 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.3
4 . This and Next Week • Sections Tuesdays/Wednesdays – attend any section you want – We’ll assign permanent sections after forming project groups – This week will help us determine the section balance • This is an Early Drop Deadline course (September 1) – If you are not serious about taking, please drop early – Dept will continue to admit students as other students drop • On the waitlist ??? – Unfortunately, we maxed out sections and this room capacity 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.4
5 . Goals for Today • What is an Operating System? – And – what is it not? • What makes Operating Systems so exciting? • Oh, and “How does this class operate?” Interactive is important! Ask Questions! Slides courtesy of David Culler, Anthony D. Joseph, John Kubiatowicz, AJ Shankar, George Necula, Alex Aiken, Eric Brewer, Ras Bodik, Ion Stoica, Doug Tygar, and David Wagner. 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.5
6 . What is an operating system? • Special layer of software that provides application software access to hardware resources – Convenient abstraction of complex hardware devices – Protected access to shared resources – Security and authentication – Communication amongst logical entities appl n appln appln OS Hardware 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.6
7 . What Does an OS do? • Provide abstractions to apps – File systems – Processes, threads – VM, containers – Naming system – … • Manage resources: – Memory, CPU, storage, … • Achieves the above by implementing specific algos and techniques: – Scheduling – Concurrency – Transactions – Security – ….. 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.7
8 . OS Basics: “Virtual Machine” Boundary Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware Instruction Set Architecture (ISA) Memory Processor Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.8
9 . OS Basics: Program => Process Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware ISA Memory Processor OS Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.9
10 . OS Basics: Context Switch Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware ISA Memory Processor OS Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.10
11 . OS Basics: Scheduling, Protection Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware ISA Memory Processor Protection Boundary OS Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.11
12 . OS Basics: I/O Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware ISA Memory Processor Protection Boundary OS Ctrlr Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.12
13 . OS Basics: Loading Threads Address Spaces Windows Processes Files Sockets Software OS Hardware Virtualization Hardware ISA Memory Processor Protection Boundary OS Ctrlr Networks storage Displays Inputs 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.13
14 . What makes Operating Systems Exciting and Challenging? 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.14
15 . Technology Trends: Moore’s Law Moore’s Law 2X transistors/Chip Every 1.5 years Called “Moore’s Law” Gordon Moore (co-founder of Intel) predicted in 1965 that the Microprocessors have transistor density of semiconductor become smaller, denser, and chips would double roughly every more powerful 18 months 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.15
16 .New Challenge: Slowdown in Joy’s law of Performance 10000 3X From Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, Sept. 15, 2006 ??%/year 1000 Performance (vs. VAX-11/780) 52%/year 100 ⇒ Sea change in chip design: 10 25%/year multiple “cores” or processors per chip 1 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006 • VAX : 25%/year 1978 to 1986 • RISC + x86 : 52%/year 1986 to 2002 • RISC + x86 : ??%/year 2002 to present 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.16
17 . Another Challenge: Power Density • Moore’s law extrapolation – Potential power density reaching amazing levels! • Flip side: battery life very important – Moore’s law can yield more functionality at equivalent (or less) total energy consumption 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.17
18 . People-to-Computer Ratio Over Time From David Culler • Today: multiple CPUs/person! – Approaching 100s? 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.18
19 . ManyCore Chips: The future is here • Intel 80-core multicore chip (Feb 2007) – 80 simple cores – Two FP-engines / core – Mesh-like network – 100 million transistors – 65nm feature size • Intel Single-Chip Cloud Computer (August 2010) – 24 “tiles” with two cores/tile – 24-router mesh network – 4 DDR3 memory controllers – Hardware support for message-passing • Amazon X1 instances – 128 virtual cores, 2 TB RAM • How to program these? – Use 2 CPUs for video/audio – Use 1 for word processor, 1 for browser – 76 for virus checking??? • Parallelism must be exploited at all levels 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.19
20 . The End of Moore’s Law… • Moore’s Law has (officially) ended -- Feb 2016 – No longer getting 2 x transistors/chip every 18 months… – or even every 24 months • May have only 2-3 smallest geometry fabrication plants left: – Intel and Samsung and/or TSMC • Vendors moving to 3D stacked chips – More layers in old geometries http://files.shareholder.com/downloads/INTC/867590276x0xS50863-16-105/50863/filing.pdf 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.20
21 . Storage Capacity • Retail hard disk capacity in GB (source: http://www.digitaltonto.com/2011/our-emergent-digital-future/ ) 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.21
22 . Network Capacity (source: http://www.ospmag.com/issue/article/Time-Is-Not-Always-On-Our-Side ) 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.22
23 . Challenge: Complexity • Applications consisting of… – … a variety of software modules that … – … run on a variety of devices (machines) that » … implement different hardware architectures » … run competing applications » … fail in unexpected ways » … can be under a variety of attacks • Not feasible to test software for all possible environments and combinations of components and devices – The question is not whether there are bugs but how serious are the bugs! 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.23
24 . A Modern Processor: Intel Sandy Bridge • Package: LGA 1155 • Transistor count: – 1155 pins – 504 Million (2 cores, 3MB L3) – 95W design envelope – 2.27 Billion (8 cores, 20MB L3) • Cache: • Note that ring bus is on high metal layers – L1: 32K Inst, 32K Data – above the Shared L3 Cache (3 clock access) – L2: 256K (8 clock access) – Shared L3: 3MB – 20MB 8/23/17 (not out yet) Stoica CS162 © UCB Fall 2017 Lec 1.24
25 . HW Functionality comes with great complexity! Intel Sandy Bridge I/O Configuration Proc Caches Busses adapters Memory Controllers Disks I/O Devices: Displays Networks Keyboards 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.25
26 . Increasing Software Complexity From MIT’s 6.033 course 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.26
27 . Example: Some Mars Rover (“Pathfinder”) Requirements • Pathfinder hardware limitations/complexity: – 20Mhz processor, 128MB of DRAM, VxWorks OS – cameras, scientific instruments, batteries, solar panels, and locomotion equipment – Many independent processes work together • Can’t hit reset button very easily! – Must reboot itself if necessary – Must always be able to receive commands from Earth • Individual Programs must not interfere – Suppose the MUT (Martian Universal Translator Module) buggy – Better not crash antenna positioning software! • Further, all software may crash occasionally – Automatic restart with diagnostics sent to Earth – Periodic checkpoint of results saved? • Certain functions time critical: – Need to stop before hitting something – Must track orbit of Earth for communication • A lot of similarity with the Internet of Things? – Complexity, QoS, Inaccessbility, Power limitations … ? 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.27
28 . How do we tame complexity? • Every piece of computer hardware different – Different CPU » Pentium, PowerPC, ColdFire, ARM, MIPS – Different amounts of memory, disk, … – Different types of devices » Mice, Keyboards, Sensors, Cameras, Fingerprint readers – Different networking environment » Cable, DSL, Wireless, Firewalls,… • Questions: – Does the programmer need to write a single program that performs many independent activities? – Does every program have to be altered for every piece of hardware? – Does a faulty program crash everything? – Does every program have access to all hardware? 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.28
29 . OS Tool: Virtual Machine Abstraction Application Virtual Machine Interface Operating System Physical Machine Interface Hardware • Software Engineering Problem: – Turn hardware/software quirks ⇒ what programmers want/need – Optimize for convenience, utilization, security, reliability, etc… • For any OS area (e.g. file systems, virtual memory, networking, scheduling): – What’s the hardware interface? (physical reality) – What’s the application interface? (nicer abstraction) 8/23/17 Stoica CS162 © UCB Fall 2017 Lec 1.29