场效应晶体管

本文主要描述了mosfet的结构和操作以及在截止、三极管和饱和区定义场效应。建立mosfet i-v特性的数学模型,介绍电子器件输出和传输特性描述的图形表示。
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1.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 1 Topic 4 Field-Effect Transistors ECE 271 Electronic Circuits I

2.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 2 Chapter Goals Describe structure and operation of MOSFETs. Define FET characteristics in operation regions of cutoff, triode and saturation. Develop mathematical models for i -v characteristics of MOSFETs. Introduce graphical representations for output and transfer characteristic descriptions of electron devices. Define and contrast characteristics of enhancement-mode and depletion-mode FETs. Define symbols to represent FETs in circuit schematics. Investigate circuits that bias transistors into different operating regions. Explore FET modeling in SPICE.

3.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 3 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices:

4.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 4 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices: - amplifications (in analog)

5.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 5 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices: - amplifications (in analog) - switching (in digital)

6.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 6 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices: - amplifications (in analog) - switching (in digital) There are two basic types of solid state transistors: BJT (bipolar junction transistor) and FET (field effect transistor).

7.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 7 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices: - amplifications (in analog) - switching (in digital) There are two basic types of solid state transistors: BJT (bipolar junction transistor) and FET (field effect transistor). FET: electric field is used to control the shape and the conductivity of the channel of one type charge carrier ( p or n ) in semiconductor device. They are also called unipolar to contrast their single-carrier-type operation with the dual-carrier-type operation of bipolar (junction) transistors (BJT).

8.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 8 Intro (1) Solid state transistor is the main building block of microelectronics. It performs two major functions used in electronic devices: - amplifications (in analog) - switching (in digital) There are two basic types of solid state transistors BJT (bipolar junction transistor) and FET (field effect transistor). FET: electric filed is used to control the shape and hence the conductivity of the channel of one type charge carrier ( p or n ) in semiconductor device. They are also called unipolar to contrast their single-carrier-type operation with the dual-carrier-type operation of bipolar (junction) transistors (BJT). FET can be of two major types MOSFET (metal oxide semiconductor field effect transistor (mostly used)), and JFET (junction field effect transistor).

9.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 9 Intro (2) Metal Oxide Semiconductor Field Effect device was first solid state device conceived ( Lilienfield , 1928), however it took very long to develop a successful commercial application of such devices. The first successful device was fabricated in 1950, however the reliable commercial fabrication did not start until decade later. Today, the CMOS technology based on MOSFET is the dominant technology in electronics.

10.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 10 Intro (2) Metal Oxide Semiconductor Field Effect device was first solid state device conceived (Lilienfield, 1928), however it took very long to develop a successful commercial application of such devices. The first successful device was fabricated in 1950, however the reliable commercial fabrication did not start until decade later. Today, the CMOS technology based on MOSFET is the dominant technology in electronics. BJT devices were first introduced in 1948 and quickly became commercially available. The first IC with logic gates and operational amplifiers that appeared in early 1960s, were based on BJT technology. They are still widely used, particularly in applications requiring high speed and high precision. BJT device is based on pn -junction structure, while MOSFET is utilizing the MOS capacitor structure.

11.NJIT ECE271 Dr. Serhiy Levkov Metal Oxide Semiconductor Field-Effect Transistors (MOSFET) Chap 4- 11

12.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 12 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor.

13.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 13 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between.

14.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 14 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between. First electrode (Gate): low-resistivity material such as metal or polycrystalline silicon.

15.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 15 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between. First electrode (Gate): low-resistivity material such as metal or polycrystalline silicon. Dielectric - Silicon dioxide: stable high-quality electrical insulator between gate and substrate .

16.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 16 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between. First electrode (Gate): low-resistivity material such as metal or polycrystalline silicon. Dielectric - Silicon dioxide: stable high-quality electrical insulator between gate and substrate. Second electrode (Substrate, Body): n - or p -type semiconductor.

17.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 17 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between. First electrode (Gate): low-resistivity material such as metal or polycrystalline silicon. Dielectric - Silicon dioxide: stable high-quality electrical insulator between gate and substrate. Second electrode (Substrate, Body): n - or p -type semiconductor. The semiconductor body has limited supply of holes and electrons, and substantial resistivity.

18.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 18 MOS Capacitor Structure Metal Oxide Semiconductor capacitor is the core structure of the a Metal Oxide Semiconductor Field Effect Transistor. Consists of two electrodes and insulator in between. First electrode (Gate): low-resistivity material such as metal or polycrystalline silicon. Dielectric - Silicon dioxide: stable high-quality electrical insulator between gate and substrate. Second electrode (Substrate, Body): n - or p -type semiconductor. The semiconductor body has limited supply of holes and electrons, and substantial resistivity. The concentration of carriers being dependant on voltage, the capacitance of this structure therefore is a nonlinear function of voltage applied.

19.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 19 Substrate Conditions for Different Biases Accumulation : V G <<V TN The majority carriers (holes) accumulate in a very thin layer below the negative gate (like in capacitor) We consider the conditions of the semiconductor region ( p -type) below the gate electrode under three different voltage bias: accumulation, depletion, inversion. Those conditions are determined by V TN (0.5 - 2.0 V) the threshold voltage, at which the electron inversion layer is just starting to form.

20.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 20 Substrate Conditions for Different Biases Accumulation : V G <<V TN , V G < 0 The majority carriers (holes) accumulate in a very thin layer below the negative gate (like in capacitor) Depletion: 0< V G <V TN The small positive charge of the gate wipe out the holes from the layer below (depletes free carriers) creative a negative charge of ionized atoms We consider the conditions of the semiconductor region ( p -type) below the gate electrode under three different voltage bias: accumulation, depletion, inversion. Those conditions are determined by V TN (0.5 - 2.0 V) the threshold voltage, at which the electron inversion layer is just starting to form.

21.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 21 Substrate Conditions for Different Biases Accumulation : V G <<V TN The majority carriers (holes) accumulate in a very thin layer below the negative gate (like in capacitor) Depletion: 0< V G <V TN The small positive charge of the gate wipe out the holes from the layer below (depletes free carriers) creative a negative charge of ionized atoms Inversion: V G >V TN The larger positive charge of the gate attracts electrons whose concentration in the very thin layer exceeds that of holes – inversion of p-type into n-type. We consider the conditions of the semiconductor region ( p -type) below the gate electrode under three different voltage bias: accumulation, depletion, inversion. Those conditions are determined by V TN (0.5 - 2.0 V) the threshold voltage, at which the electron inversion layer is just starting to form.

22.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 22 Low-frequency C-V Characteristics for MOS Capacitor on P-type Substrate MOS capacitance is non-linear function of voltage. Total capacitance in any region is dictated by the separation between capacitor plates. Total capacitance can be modeled as series combination of fixed oxide capacitance and voltage-dependent depletion layer capacitance.

23.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 23 NMOS Transistor: Structure A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

24.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 24 NMOS Transistor: Structure 4 device terminals: Gate(G) A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

25.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 25 NMOS Transistor: Structure 4 device terminals: Gate(G) Drain(D) A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

26.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 26 NMOS Transistor: Structure 4 device terminals: Gate(G) Drain(D), Source(S) A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

27.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 27 NMOS Transistor: Structure 4 device terminals: Gate(G) Drain(D), Source(S) Body(B) A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

28.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 28 NMOS Transistor: Structure 4 device terminals: Gate(G) Drain(D), Source(S) Body(B). Source and drain regions form pn junctions with substrate. A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.

29.NJIT ECE271 Dr. Serhiy Levkov Chap 4- 29 NMOS Transistor: Structure 4 device terminals: Gate(G) Drain(D), Source(S) Body(B). Source and drain regions form pn junctions with substrate. v SB ,= v S – v B , v DS = v D - v S and v GS = v G - v S are typically nonnegative during normal operation. A N-MOSFET is formed by adding two heavily doped n -type ( n + , about one of 100 of silicon atoms is replaced with donor), regions to the MOS capacitor. The resulting diffusions provide a supply of electrons that can rapidly form the inversion layer and easily move under the gate, and also make terminals to apply a voltage and create a current in the channel region.